Fat Duen Ho, Ph.D.


Fat HoProfessor
Electrical & Computer Engineering

Office:
Phone:
Fax:
E-mail:

EB 263D
(256) 824-6168
(256) 824-6803
hof@uah.edu

Education

1976   Ph.D.    Southern Illinois University

1971   MSEE    Southern Illinois University

Biography

 Dr. Ho works with graduate students researching and publishing papers in the areas of microelectronic devices, circuits, and materials. His present research interests focus on microelectronic device modeling for integrated circuit design, nonvolatile semiconductor memories, metal-ferroelectric-semiconductor field effect transistors, ferroelectric nonvolatile memories, digital and analog and RF circuits using ferroelectric devices, RF (radio frequency) MOSFET modeling for wireless communications, and RF circuits for wireless communications. He has been actively involved in the research on digital and analog, and RF circuits using ferroelectric transistors and ferroelectric capacitors. He and his students attend Integrated Ferroelectric conferences worldwide, publishing and presenting their results.

Research Expertise

  • Microelectronic device modeling for integrated circuit design, nonvolatile semiconductor memories, metal-ferroelectric-semiconductor field effect transistors
  • RF (radio frequency) MOSFET modeling for wireless communication
  • Digital and analog circuite using ferroelectric devices
  • RF ciruits using ferroelectric devices
  • RF circuits for wireless communication

Honors & Awards

  • Outstanding Educator Award, IEEE, Huntsville, 2005

Recent Publications

Journal Papers

Crystal L. McCartney, Cody Mitchell, Mitchell Hunt, and Fat D. Ho, “Design and Testing of a 1T-1C Dynamic Memory Cell Utilizing a Ferroelectric Transistor,” International Journal of Integrated Ferroelectrics, 157:1, 1-11, 2014.

Mitchell R. Hunt, Crystal L. McCartney, Cody Mitchell, Joseph Evans and Fat D. Ho, “Empirical Data of the Metal-Ferroelectric-Semiconductor Field Effect Transistor Polarization and Channel Resistance for Timing and Retention Analysis,” International Journal of Integrated Ferroelectrics, 157:1; 12-22, 2014.

Cody Mitchell, Crystal L. McCartney, Mitchell Hunt and Fat D. Ho, “Characteristics of a Three-Transistor DRAM Circuit Utilizing a Ferroelectric Transistor,” International Journal of Integrated Ferroelectrics, 157:1, 31-38, 2014.

Mitchell R. Hunt, Rana Sayyah, Cody Mitchell, Crystal L. McCartney, Todd C. MacLeod and Fat D. Ho, “Extended Characterization of the Common-Source and Common-Gate Amplifiers Using a Metal-Ferroelectric-Semiconductor Field Effect Transistor,” International Journal of Integrated Ferroelectrics, 157:1, 71-80, 2014.

Mitchell R. Hunt, Rana Sayyah, Cody Mitchell, Crystal L. McCartney, Todd C. MacLeod and Fat D. Ho, “Mathematical Models of the Common-Source and Common-Gate Amplifiers Using a Metal-Ferroelectric-Semiconductor Field Effect Transistor,” International Journal of Integrated Ferroelectrics, 157:1,81-88, 2014.

Caroline S. John, Todd MacLeod, Fat D. Ho, and Joseph Evans, “Temperature Effects on a Non-Volatile Memory Device with Ferroelectric Capacitor,” International Journal of Integrated Ferroelectrics, 157:1, 23-30, 2014.

Rana Sayyah, Mitchell Hunt, Fat D. Ho, “A Physically-Derived Nonquasi-Static Model of Ferroelectric Amplifiers for Computer-Aided Device Simulation Part I: the Ferroelectric Common-Drain Amplifier,” Solid-State Electronics, 86; 51-57, 2013.

Rana Sayyah, Mitchell Hunt, Fat D. Ho, “A Physically-Derived Nonquasi-Static Model of Ferroelectric Amplifiers for Computer-Aided Device Simulation Part II: the Ferroelectric Common-Source and Common-Gate Amplifiers”, Solid-State Electronics, 86; 58-63, 2013.

Mitchell Hunt, Rana Sayyah, Todd C. MacLeod, Fat D. Ho, "Expanded-Characterization of the Common-Drain Amplifier Using Metal-Ferroelectric-Semiconductor Field Effect Transistors," Integrated Ferroelectrics, 141(01), pp. 134-144, 2013.

Scott Wolfson, Fat D. Ho, “Transient Simulation to Analyze Flash Memory Programming Improvements Due to Germanium Content in the Substrate Using Nonquasi-Static Techniques,” Microelectronic Engineering, Accepted for publication, 2012.

Cody Mitchell, C. Laws, T. MacLeod, Fat D. Ho, “Characteristics of a Nonvolatile SRAM Cell Utilizing a Ferroelectric Transistor,” Integrated Ferroelectrics, Vol. 132, pp. 82-87, 2012.

 Caroline Jonn, T. MacLeod, Joe Evans, Fat D. Ho, “Characteristics of an Autonomous Nonvolatile Ferroelectric Memory Latch,” Integrated Ferroelectrics, Vol. 132, pp. 76-81, 2012.

 Thomas Phillips, Todd MacLeod, Fat D. Ho, “Modeling of Sonos Memory Cell Erase Cycle,” Integrated Ferroelectrics, Vol. 132, pp. 70-75, 2012.

 T. MacLeod, W. Herb Sims, Kosta A. Varnavas, Fat D. Ho, “Results from on-Orbit Testing of the Fram Memory Test Experiment on the Fastsat Micro-Satellite,” Integrated Ferroelectrics, Vol. 132, pp. 88-98, 2012.

 Mitchell Hunt, Rana Sayyah, Todd MacLeod, Fat D. Ho, “Characterization of a Common-Gate Amplifier Using Ferroelectric Transistors,” Integrated Ferroelectrics, Vol. 134, pp. 121-129, 2012.

 Scott Wolfson, Fat D. Ho, “Flash Program Modeling Using Nonquasi-Static and Tunneling Techniques,” Microelectronic Engineering, Vol. 96, pp. 40-44, 2012.

 R. Sayyah, T. MacLeod, Fat D. Ho, “Radiation-Hardened electronics and Ferroelectric Memory for Space Flight Systems,” Ferroelectrics, 413, pp. 170-175, 2011.

 Mitchell Hunt, Rana Sayyah, Todd MacLeod, Fat D. Ho, “Characterization of a Common-Source Amplifier Using Ferroelectric Transistors,” Integrated Ferroelectrics, Vol. 124, pp. 157-166, 2011.

 R. Sayyah, M. Hunt, T. MacLeod, Fat D. Ho, “Modeling a Common-Source Amplifier Using Ferroelectric Transistors,” Integrated Ferroelectrics, Vol. 124, pp. 147-156, 2011.

 T. MacLeod, T. Phillips, Fat D. Ho, “SONOS Nonvolatile Memory Cell Programming Characteristics,” Integrated Ferroelectrics, Vol. 124, pp. 131-139, 2011.

 Cody Mitchell, C. Laws, T. MacLeod, Fat D. Ho, “Static Characteristics of the Ferroelectric Transistor Inverter,” Integrated Ferroelectrics, Vol. 125, pp. 123-129, 2011.

 C. Laws, C. Mitchell, T. MacLeod, Fat D. Ho, “Switching Characteristics of the Ferroelectric Transistor Inverter,” Integrated Ferroelectrics, Vol. 125, pp. 141-146, 2011.

S. Wolfson, Fat D. Ho, “Temperature Dependent Flash Memory Erase Transient Simulation (Part I),” Microelectronic Engineering, Vol. 87, 2010.

 S. Wolson, Fat D. Ho, “Temperature Dependant Flash Memory Erase Transient Simulation (Part II),” Microelectronic Engineering, vol. 87, 2010.

 Scott Wolfson and F.D. Ho, “Transient Simulation to analyze Flash Memory Erase Improvements Due to Germanium Content in the substrate,” IEEE Transactions on Electron Devices, vol. 57, no. 10, October 2010.

 R. Sayyah, M. Hunt, T. MacLeod, Fat D. Ho, “A Mathematical Model of a Common-Drain Amplifier Using a Ferroelectric Transistor,” Integrated Ferroelectrics, Vol. 113, pp. 49-62, 2010

Thomas A. Phillips, Todd C. MacLeod and Fat Duen Ho, “Ferroelectric Field-Effect Transistor Differential Amplifier Circuit Analysis”, Integrated Ferroelectrics, Vol. 105pp. 107-117, 2009.

Rana Sayyah, M. Hunt, T. MaCleod, Fat D. Ho, “An Empirical Study of FeFET-Based Analog Amplifier,” Integrated Ferroelectrics, 107(01), pp. 31-42, 2009.

Todd C. MacLeod, Thomas A. Philips, and Fat Duen Ho,  “Characterizing an Analog Amplifier Utilizing a Ferroelectric Transistor,” Integrated Ferroelectrics, Vol. 104, pp. 40-47, 2008.

Thomas A. Phillips, Todd C. MaCleod and Fat Duen Ho, “Modeling of a Ferroelectric Field-Effect Transistor Static or Random Access Memory Cell,” Integrated Ferroelectrics, Vol. 98, pp. 69-74, 2008.

Todd C. MacLeod, Thomas A. Philips, and Fat Duen Ho,   “Performance Measurement of a Multi-Level/Analog Ferroelectric Memory Device Design,” Integrated Ferroelectrics Int. Jour,  Vol. 93, Issue 1, p.29, 2007.

Todd MacLeod and Fat Duen Ho, “Modeling of Ferroelectric Field-Effect Transistor Characteristic from Micro to Nano,” Ferroelectrics, Vol. 350, pp.65-74, 2007.

S. Wolfson and Fat Duen Ho, "Negative-Gate to Substrate Erase Transient Simulation for Flash Memory,"Microelectronic Engineering, 84, p101-104, 2007.

Todd MacLeod, Thomas A. Phillip and Fat Duen Ho, " Design of a Mulit-Level/Analog Ferroelectric Memory Device," Integrated Ferroelectrics, Vol. 89, p.12-19, 2007.

Thomas Phillips, Todd MacLeod and Fat Duen Ho, "MFSFET NAND Gate Switching Time Analysis," Integrated Ferroelectrics, Vol. 89, p. 180-188, 2007.

Thomas A. Philips, Todd MacLeod and Fat Duen Ho, "Modeling of a Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate," Ferroelectrics 333, 177-181,  April-May Issue 2006.

Todd MacLeod, Thomas A. Phillip and Fat Duen Ho, " Characteristics of Ferroelectric Logic Gates Using a Spice-Based Model," Ferroelectrics, April-May Issue 2006.

Thomas A. Philips, Mark A. Bailey and Fat Duen Ho, "A Novel Metal-Ferroelectric-Semiconductor Field-Effect Transistor Memory Cell Design," Integrated Ferroelectrics, Vol. 67, 229-234, 2004.

Todd MacLeod and Fat Duen Ho, "Ferroelectric Field-Effect Transistor Model Using Partitioned Ferroelectric Layer and Partial Polarization," Integrated Ferroelectrics, Vol. 64, pp. 89-100, 2004.

Todd MacLeod and Fat Duen Ho, "Design of a Ferroelectric Programmable Logic Gate Array," Integrated Ferroelectrics, Vol. 56, pp. 1031-1021, 2003.

Mark A. Bailey and Fat Duen Ho, "A Metal-Ferroelectric-Semiconductor Field-Effect Transistor Modeling Using a Partitioned Ferroelectric Layer," Integrated Ferroelectrics, Vol. 51, pp. 19-37, 2003.

Todd MacLeod and Fat Duen Ho, "Simulation Model of a Ferroelectric Field Effect Transistor," Integrated Ferroelectrics, Vol. 49, pp. 51-59, 2002.

T. C MacLeod and Fat Duen Ho, "Electronic Model of a Ferroelectric Field Effect," Integrated Ferroelectrics, Vol. 40, pp. 55-64. 2001.

Mark A. Bailey and Fat Duen Ho, "A Drain Current Data Capture System for Metal-Ferroelectric-Semiconductor Field Effect Transistors," Integrated Ferroelectrics, Vol. 32, pp. 21-32, 2001.

T. C MacLeod and Fat Duen Ho, "I-V Characteristics of a Ferroelectric Field Effect Transistor," Integrated Ferroelectrics, Vol. 34, pp.21-26. 2001.

Mark A. Bailey and Fat Duen Ho, "An Empirical Ferroelectric Capacitor Model Utilizing a Dual Curve-fit Technique," Integrated Ferroelectrics, Vol. 29, pp. 273-282. 2000.

Todd C. Macleod and Fat Duen Ho, "Integrating Partial Polarization into a Metal-Ferroelectric-Semiconductor Field Effect Transistor Model," Integrated Ferroelectrics, Vol. 27, 1137-1145, 1999.

Dan Yang, Robert S. Axley, and Fat Duen Ho, "Capacitor Model for a Floating Gate EEPROM Cell," International Journal of Electronics, vol. 84, No. 6, pp. 561-581, 1998.

John Elmer Asquith, Chang-Ling Sung, Fat Duen Ho, and Chung Bun Chan. "A Two-dimensional Numerical Model of a Floating-Gate EEPRIOM Transistor," International Journal of Electronics, Vol. 85, pp. 697-712, 1998.

T. C MacLeod and Fat Duen Ho, "Modeling of Metal-Ferroelectric-Semiconductor Field Effect Transistors,"Integrated Ferroelectrics, Vol. 21, pp. 127-143,1998.

P. Ghazzavi and Fat Duen Ho, "A Numerical Model for MOSFETs from Liquid-Nitrogen Temperature to Room Temperature," IEEE Transactions on Electron Devices, Vol. 42, No. 1, pp. 123-134, 1995.

M. Doghish and Fat Duen Ho, "A Comprehensive Analytical Model for Metal-Insulator-Semiconductor (MIS) Devices: A Solar Cell Application," IEEE Transactions on Electron Devices, Vol. 40, No. 8, pp. 1446-1454, 1993.

M. Doghish and Fat Duen Ho, "A Comprehensive Analytical Model for Metal-Insulator-Semiconductor (MIS) Devices," IEEE Transactions on Electron Devices, Vol. 39, No. 12, pp. 2771-2780, 1992.

Fat Duen Ho, "An Analytical Model for Depletion Region Capacitance and Width of Diffused P-N Junctions,"International Journal of Electronics, Vol. 71, No. pp. 417-438, 1991.

Fat Duen Ho, "The Space-Charge Layer Capacitance and the Offset Voltage of an Exponential-Constant P-N Junction," International Journal of Electronics, Vol. 70, No. 2, pp. 327-342, 1991.

Fat Duen Ho, "A Simple Model for Space-Charge Region Capacitance of an Exponential-Constant P-N Junction,"
Electronics Letters, Vol. 26, No. 25, pp. 2063-2065, Dec. 6, 1990.

Fat Duen Ho, "The Offset Voltage and the Space-Charge Layer Capacitance of a Linearly-Graded P-N Junction and an Abrupt P-N Junction," International Journal of Electronics, Vol. 69, No. 2, pp. 247-266, 1990.


Conference Papers

Crystal L. McCartney, Cody Mitchell, Mitchell Hunt, and Fat D. Ho, “Design and Testing of a 1T-1C Dynamic Memory Cell Utilizing a Ferroelectric Transistor,” 2013 ISIF, Grapevine, Texas, July 28-31, 2013.

Mitchell R. Hunt, Crystal L. McCartney, Cody Mitchell, Joseph Evans and Fat D. Ho, Empirical Data of the Metal-Ferroelectric-Semiconductor Field Effect Transistor Polarization and Channel Resistance for Timing and Retention Analysis, 2013 ISIF, Grapevine, Texas, July 28-31, 2013.

Cody Mitchell, Crystal L. McCartney, Mitchell Hunt and Fat D. Ho, “Characteristics of a Three-Transistor DRAM Circuit Utilizing a Ferroelectric Transistor,” 2013 ISIF, Grapevine, Texas, July 28-31, 2013.

Mitchell R. Hunt, Rana Sayyah, Cody Mitchell, Crystal L. McCartney, Todd C. MacLeod and Fat D. Ho, “Extended Characterization of the Common-Source and Common-Gate Amplifiers Using a Metal-Ferroelectric-Semiconductor Field Effect Transistor,” 2013 ISIF, Grapevine, Texas, July 28-31, 2013.

Mitchell R. Hunt, Rana Sayyah, Cody Mitchell, Crystal L. McCartney, Todd C. MacLeod and Fat D. Ho, “Mathematical Models of the Common-Source and Common-Gate Amplifiers Using a Metal-Ferroelectric-Semiconductor Field Effect Transistor,” 2013 ISIF, Grapevine, Texas, July 28-31, 2013.

Caroline S. John, Todd MacLeod, Fat D. Ho, and Joseph Evans, “Temperature Effects on a Non-Volatile Memory Device with Ferroelectric Capacitor,” 2013 ISIF, Grapevine, Texas, July 28-31, 2013.

Mitchell R. Hunt, Rana Sayyah, Todd C. MacLeod, Fat D. Ho,A Mathematical Model for the Common-Drain Amplifier Using a Metal-Ferroelectric-Semiconductor Field Effect Transistor,” 2012 ISIF, Hong Kong, June 2012.

Mitchell R. Hunt, Rana Sayyah, Todd C. MacLeod, Fat D. Ho, “Expanded Characterization of the Common-Drain Amplifier Using Metal-Ferroelectric-Semiconductor Field Effect Transistors,” 2012 ISIF, Hong Kong, June 2012.

Crystal Laws McCartney, Cody Mitchell, Mitchell R. Hunt, Todd C. MacLeod, Fat D. Ho, “I-V Characteristics of a Static Random Access Memory Cell,” 2012 ISIF, Hong Kong, June 2012.

Todd C. MacLeod, Fat D. Ho, et al., “Development of Next Generation Memory Test Experiment for Deployment on a Small Satellite, 2012 ISIF, Hong Kong, June 2012.

Caroline S. John, Todd C. MacLeod, Joe Evans, and Fat D. Ho, “Retention analysis of a Non-Volatile Ferroelectric Memory Device,” 2012 ISIF, Hong Kong, June 2012

Todd C. MacLeod, Thomas A. Philips, and Fat Duen Ho,   “Characterizing an Analog Amplifier Utilizing a Ferroelectric Transistor (#446),” Presented at the 20th International Symposium on Integrated Ferroelectrics in Singapore, June 9-12, 2008.

Todd C. MacLeod, Thomas A. Philips, and Fat Duen Ho,   “Ferroelectric Field-Effect Transistor Differential Amplifier Circuit Analysis (#535),” Presentated at the 20th International Symposium on Integrated Ferroelectrics in Singapore, June 9-12, 2008.

Todd C. MacLeod, Thomas A. Philips, and Fat Duen Ho, "Performance Measurement of a Multi-Level/Analog Ferroelectric Memory Device Deign," presentation at the 19th International Symposium on Integrated Ferroelectrics in Bordeaux, France, May 8-11, 2007.

Thomas A. Philips, Todd C. MacLeod, and Fat Duen Ho, "Modeling of Ferroelectric Field-Effect Transistor Static Random Access Memory Cell," presentation at the 19th International Symposium on Integrated Ferroelectrics in Bordeaux, France, May 8-11, 2007.

Thomas A. Philips, Todd C. MacLeod, and Fat Duen Ho, "Switching Time Analysis Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate", Presented at the 18th International Symposium on Integrated Ferroelectrics in Honolulu, Hawaii, April 23-27, 2006.

Todd C. MacLeod, Thomas A. Philips, and Fat Duen Ho, "Design of a Multi-Level/Analog Ferroelectric Memory Device", Presented at the 18th International Symposium on Integrated Ferroelectrics in Honolulu, Hawaii, April 23-27, 2006.

Michael Walter Payton and Fat Duen Ho, "Large-Signal Nonquasi-Static MOSFET Model for Computer Aided Device and Circuit Simulation Part I: MOSFETS and CMOS Inverters," presentation at the 2005 IEEE International Symposium on Circuits and Systems, Kobe, Japan, May 23-26, 2005.

Michael Walter Payton and Fat Duen Ho, "Large-Signal Nonquasi-Static MOSFET Model for Computer Aided Device and Circuit Simulation Part II: The CMOS NOR Gate and the CMOS NAND Gate," presentation at the2005 IEEE International Symposium on Circuits and Systems, Kobe, Japan, May 23-26, 2005.

Thomas A. Philips, Todd C. MacLeod, and Fat Duen Ho, " Modeling of A Metal-Ferroelectric-Semiconductor Field-Effect Transistor NAND Gate," presentation at the 11th International Meeting on Ferroelectrics in Foz do Iguacu, Brazil, September 5-9, 2005.


Todd C. MacLeod, Thomas A. Philips, and Fat Duen Ho, "Characteristics of Ferroelectric Logic Gates Using a SPICE-Based Model," presentation at the 11th International Meeting on Ferroelectrics in Foz do Iguacu, Brazil, September 5-9, 2005.

Barbara Robertson, Fat Duen Ho, and Tracy Hudson, "Modeling and Fabrication of RF MEMS Switches," presented at the 2004 International conference on Communications in Computing, Las Vegas, Nevada, June 21-24, 2004.

Todd MacLeod and Fat Duen Ho, "Ferroelectric Field Effect Transistor Model Using Partitioned Ferroelectric Layer and Partial Polarization," presented in the 16th International Symposium on Integrated Ferroelectrics, Gyeongju, South Korea, April 5-8, 2004.

Thomas A. Phillips, Fat Duen Ho and Mark Bailey, "A Novel Metal-Ferroelectric-Semiconductor Field-Effect Transistor (MFSET) Memory Cell Design," presented in the 16th International Symposium on Integrated Ferroelectrics, Gyeongju, South Korea, April 5-8, 2004.

Frederick Clarke, Fat Duen Ho, Asif Khan, Grigory Simin, J. Yang, Remis Gaska, and Michael S. Shur, "Gate Current and Analytical Modeling in Insulating Gate III - N Heterostructure Field Effect Transistor," Mat. Res. Soc. Symp. Proc., Vol. 743, 2003.

Todd McLeod and Fat Duen Ho, "Design of a Ferroelectric Programmable Logic Gate Array," 15th International Symposium on Integrated Ferroelectrics, Colorado Springs, March 9-12, 2003.

Mark A. Bailey and Fat Duen Ho, "A Metal-Ferroelectric-Semiconductor Field-Effect Transistor Memory Cell,"14th International Symposium on Integrated Ferroelectrics, May 27-June 1, 2002, Japan.

Todd MacLeod and Fat Duen Ho, "Simulation Model of a Ferroelectric Field Effect Transistor," 14th International Symposium on Integrated Ferroelectrics, May 27-June 1, 2002, Japan.

Andrew B. Phillips and Fat Duen Ho, "Potential Charge Balance Model for a Floating Gate EEPROM Cell," Accepted for publication, Proceedings of the IEEE International Symposium on Circuit and Systems, Arizona, May 2002.

Mark A. Bailey and Fat Duen Ho, "A Drain Current Data Capture System for Metal-Ferroelectric-Semiconductor Field Effect Transistors," ABSTRACTS, 12th International Symposium on Integrated Ferroelectrics, Aachen, Germany, March 2000.

T. C MacLeod and Fat Duen Ho, "I-V Characteristics of a Ferroelectric Field Effect Transistor," 12th International Symposium on Integrated Ferroelectrics, Aachen, Germany, March 2000.

T. C MacLeod and Fat Duen Ho, "Integrating Partial Polarization into a Metal-Ferroelectric-Semiconductor Field Effect Transistor Model," 11th International Symposium on Integrated Ferroelectrics, Colorado Springs, CO, March 1999.

T. C MacLeod and Fat Duen Ho, "Modeling of Metal-Ferroelectric-Semiconductor Field Effect Transistors," 10th International Symposium on Integrated Ferroelectrics, March 1998.